Advanced Packaging
Advanced packaging is the semiconductor route highlighted in EP270 一枚芯片的漫长征途:我们离“算力自由”还有多远? as one of China’s relatively stronger catch-up areas. Packaging protects chips, connects them electrically to the outside world, and increasingly affects system performance when AI workloads need fast data movement between processors and memory.
The episode links advanced packaging to [[HighBandwidthMemory|HBM]] and the [[MemoryWall|memory wall]]. Stacking memory, shortening connections, and improving chip-to-chip links can raise effective bandwidth when raw process scaling is harder. At the same time, the source cautions that packaging is not an independent shortcut: it needs enough advanced wafers, materials, equipment, and production volume to matter economically.
Key Claims
- Packaging has moved from a lower-visibility back-end step toward a performance-critical AI infrastructure layer.
- China’s relative gap is described as smaller in packaging than in advanced lithography or leading-edge wafer fabrication.
- Earlier acquisitions and industry funding helped domestic packaging firms absorb advanced packaging capability.
- Packaging helps only when matched with suitable chips and memory; applying advanced packaging to much older nodes may not create meaningful performance gain.
Connections
- JCET / 长电科技 — packaging company and factory visit in the source.
- High Bandwidth Memory, Memory Wall, and Semiconductor 3D Stacking — performance and architecture context.
- TSMC — existing wiki page where advanced packaging also appears as an HBM and CoWoS-style bottleneck.
- Domestic AI Chip Catch-Up and Semiconductor Supply Chain — domestic strategy and chain context.