Semiconductor Supply Chain

Semiconductor supply chain is the design, wafer manufacturing, packaging, and testing system explained in EP270 一枚芯片的漫长征途：我们离“算力自由”还有多远？. The episode uses this three-part breakdown to push against the idea that chips are only a single product category or that one bottleneck, such as a lithography machine, determines the whole industry.

The concept matters because chip capability emerges from many linked constraints. Design teams need [[ElectronicDesignAutomation|EDA]] and verification; fabs need lithography, materials, cleanrooms, gases, equipment, yield control, and huge capital expenditure; packaging and testing determine whether bare dies can become reliable parts for phones, cars, computers, and AI systems.

Key Claims

• Design, manufacturing, and packaging/testing are separable industrial layers, but they are tightly interdependent in practice.
• Everyday chips and frontier AI chips sit on the same broad chain, even though their complexity and capital requirements differ sharply.
• Supply-chain weakness can appear as missing tools, missing equipment, poor yield, high cost, scarce capacity, or weak software ecosystems.
• Domestic AI Chip Catch-Up needs a closed loop across the chain, not only isolated progress in one company or one process node.

Connections

• Electronic Design Automation, Tape-Out Risk, and Photolithography Bottleneck — design and manufacturing constraints.
• TSMC, SMIC, Samsung, Intel, and ASML / 阿斯麦 — key manufacturing and equipment actors in the source.
• JCET / 长电科技 and Advanced Packaging — packaging/testing branch.
• Supply Chain Sovereignty and AI Hardware Supply Chain Pressure — strategic and market-pressure context.