Synopsys / 新思科技

Synopsys appears in EP270 一枚芯片的漫长征途：我们离“算力自由”还有多远？ as one of the major global EDA vendors. The episode presents EDA as a software toolchain rather than a single program, and says incumbent vendors such as Synopsys benefit from decades of iteration and customer feedback.

In the source, Synopsys matters because chip design capability is inseparable from the software used to describe, simulate, verify, and prepare hardware for fabrication. That makes EDA dependence part of domestic AI-chip catch-up, not only a procurement detail.

华为的「韬定律」，是创新还是噱头？｜ Bonus adds Synopsys indirectly through Zhang Haijun / 张海军, introduced as a former senior engineer at the company. His comments use that EDA background to argue that Cell-to-Cell Logic Stacking would require new design flows, not just packaging ambition.

Connections

• Electronic Design Automation — main toolchain context.
• Cadence Design Systems / 楷登 and Siemens EDA / 西门子EDA — peer EDA vendors named in the episode.
• Tape-Out Risk — design-to-silicon risk that EDA tools help reduce.
• Semiconductor Supply Chain — design layer of the chain.
• Zhang Haijun / 张海军 and Cell-to-Cell Logic Stacking — What’s Next bonus source that uses an EDA perspective to evaluate Tau Law.