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存储三巨头破万亿市值，存储超级周期何时能见顶？｜ S10E13

source Episode summary Updated 2026-07-12 Tags: Podcast, Whats-Next, Ai, Semiconductors, Memory, Storage

Summary

This What’s Next｜科技早知道 episode explains why AI infrastructure has pushed memory and storage into an AI Storage Supercycle. The discussion connects High Bandwidth Memory, DRAM, NAND, advanced packaging, AI inference, and agent workflows into one supply-demand frame: data movement is becoming as important as raw accelerator compute. Its balanced claim is that AI demand, capital discipline, and Memory Capacity Lock-In can lengthen the upcycle, but Storage Industry Cyclicality has not disappeared.

Key Claims

  • AI server demand is redirecting memory supply away from consumer electronics, making phone and PC makers more exposed to DRAM and NAND price increases.
  • The episode frames AI data-center storage as an AI Data Center Memory Hierarchy from on-chip SRAM to High Bandwidth Memory, DRAM, NAND SSDs, and hard drives.
  • The core technical bottleneck is the Memory Wall: accelerator compute can scale faster than data movement, so interconnect, memory bandwidth, and latency shape system throughput.
  • Inference can be more memory-hungry than training because long contexts and KV cache raise memory pressure as model use shifts from training runs toward production use.
  • HBM scarcity is tied not only to memory dies, but also to TSMC CoWoS-style advanced packaging capacity and the memory capacity bundled into each Nvidia accelerator generation.
  • [[SKHynix|SK Hynix]], Samsung, and Micron Technology are described as the main overseas HBM suppliers, with SK Hynix leading the source’s cited HBM3E market and Samsung and Micron contesting later-generation shares.
  • Storage Industry Cyclicality remains rooted in capital intensity, standardized products, lagged capacity, full-utilization incentives, and inventory swings.
  • This cycle differs from older PC or smartphone cycles because DRAM, HBM, and NAND demand are rising together while AI server customers can absorb higher component prices than low-margin phone makers.
  • Long-term agreements have changed meaning: the episode says some domestic deals lock volume without locking price, while overseas customers may pay deposits or help fund capacity to secure future supply.
  • Algorithmic efficiency and memory-compression improvements do not automatically reduce total demand; the source uses a Jevons Paradox In AI logic where cheaper or more efficient inference can unlock more context and more workloads.
  • Nvidia CMX-style NAND plus DPU designs, Google CXL memory pooling, and Semiconductor 3D Stacking are presented as utilization and hierarchy strategies, not clean replacements for HBM.
  • Cerebras is treated as a differentiated wafer-scale inference route whose SRAM-centric design can fit specific workloads but does not replace general GPU clusters.
  • Agent-Era NAND Storage is the episode’s distinctive storage claim: long agent workflows need intermediate state saved and recoverable, making NAND part of the inference process rather than only the final-output store.
  • SanDisk’s High Bandwidth Flash is presented as a promising but limited NAND-derived direction because capacity and cost are attractive, while endurance, heat, and KV-cache latency still constrain substitution for HBM.
  • ChangXin Memory / 长鑫存储 and Yangtze Memory Technologies / 长江存储 represent the domestic Chinese memory branch: ChangXin is tied to DRAM and possible HBM work, while Yangtze Memory is tied to NAND.

Key Quotes

“AI 抢走内存” - opening shorthand for the consumer-electronics shortage.

“锁量不锁价” - the domestic long-agreement pattern described by the guest.

“弱化了存储行业的周期性” - the episode’s caveat that AI changes the cycle without abolishing it.

Connections

Contradictions

  • No direct factual contradiction found with existing wiki content.
  • The source reinforces Memory Chip Shortage but shifts the explanation from archive and hard-drive scarcity toward DRAM/HBM/NAND allocation inside AI infrastructure.
  • The source qualifies High Bandwidth Memory and AI Hardware Supply Chain Pressure by arguing that NAND, CXL memory pools, SRAM stacking, and wafer-scale designs improve the hierarchy but do not remove HBM demand in the near term.